The overall flow and significance of wafer testing

1. Wafer fixation: The wafer is fixed to a vacuum suction chuck to ensure that the wafer is stabilized.

2. Probe contact: A very thin probe is used to make contact with each solder pad on the chip to establish an electrical connection.

3. Electrical Tester Test: The electrical tester is driven by a power supply to test the circuit and record the results.

4. Computer control: the number, sequence and type of tests are controlled by a computer program for automated testing.

5. Accounting for qualified and defective products: According to the test results,wafer tester qualified chips and defective products are accounted for and comprehensive performance feedback is provided.

The significance of wafer testing is mainly reflected in the following aspects:

1. Identification of qualified chips: Before the wafers are sent to the packaging plant, qualified chips can be identified through wafer testing to avoid unqualified chips into the next process and reduce manufacturing costs. 2.

2. Characterization: By testing the electrical parameters of devices/circuits,wafer probe testing engineers can monitor the distribution of parameters and maintain the quality level of the process.

3. Provide feedback: The accounting of qualified and defective chips will provide comprehensive performance feedback to wafer production personnel, helping them to improve the production process and improve the yield rate.

4. Statistical methods: wafer testing is one of the main chip yield statistics, through the testing of chips on the wafer, you can derive the overall yield data.

With the increase in chip size and density, the cost of wafer testing is getting bigger and bigger, so it needs longer test time and more sophisticated and complex equipment to perform test work and monitor test results. At the same time, visual inspection systems need to be more sophisticated and expensive.vibration isolation table In order to simplify the test process and improve efficiency, designers need to consider how to introduce storage arrays for test pattern design, as well as methods such as interlaced testing or simultaneous testing of multiple chips.